To increase a sensitivity in a terahertz detector, a charge of a channel may be gathered in a two-dimensional (2D) form by a gate field effect. In general, compound semiconductors have a relatively high efficiency of forming a 2D channel charge as compared to silicon and thus, have been widely used. However, in terms of the compound semiconductors, a manufacturing cost may be higher than that of the silicon and, due to an inconvenience in an etching process for forming a shape, it is difficult to apply various asymmetric structures. Also, when using the compound semiconductors, an integration of peripheral elements such as an antenna and an amplifier may be difficult. For this reason, a commercialization of the compound semiconductor may also be difficult.
In recent years, there has been reported that a performance of a silicon field-effect transistor (FET)-based detector is improved based on improvements in performances of an antenna and an amplifier. Basically, since the silicon FET has a low power characteristic, the improvement of the reactivity of the terahertz detector may be limited when the performances of the peripheral elements are improved only.
In general, an FET-based terahertz (THz) detector may allow THz-wave signals corresponding to alternating current signals to be concentrated between two terminals, for example, a gate G and a source S of three external connection terminals, for example, the gate G, the source S, and a drain D of an FET. Through this, the FET-based THz detector may obtain an asymmetry in an amount of charge in a lower semiconductor channel area between the source and the drain. Based on such asymmetric charge distribution, the FET-based THz detector may detect a photoresponse using a direct current (DC) voltage of an output terminal, for example, the drain D, thereby detecting a signal.
As the foregoing, to obtain the asymmetry in the amount of charge for increasing a reactivity of the FET-based THz detector, an efficiency of an antenna for receiving a THz wave may increase and a gain of an amplifier amplifying a voltage of the output terminal, the drain D may also increase. Even if the aforementioned scheme is used, the output voltage of the FET that is based on a symmetric structure may be susceptible to noise and thus, a degree of improvement of the reactivity may be relatively small.
When the FET is fabricated in a self-aligned gate structure, which is an advantage of a silicon process, source/drain areas overlapping the gate may need to be asymmetric after the gate has been formed. Also, an additional complex mask process such as an ion implantation process of overlapping for ultrafine and high-performance elements may be required to change either the source/drain areas overlapping the gate. Due to an isotropic diffusion of the ions implanted for such asymmetry, an asymmetry rate of the source/drain facing the gate corresponding to a terminal receiving the THz wave may be reduced and thus, a charge asymmetry effect may be insignificantly high.
A gate sidewall process (of a gate overlapping a lower channel) for an underlap for a high-voltage power device may also effectively control the asymmetry effect by adjusting a thickness of a sidewall. In an underlap structure, the asymmetry effect of the gate following a generation of the underlap may be insignificant and a resistance of an element may increase, which may lead to an increase in noise equivalent power.
Although the asymmetric source/drain area is created based on a self-aligned gate structure which is a main method of a typical silicon technology-based FET process, the asymmetric source/drain area facing the gate corresponding to the terminal receiving the THz-wave may have little or no change and thus, the charge asymmetry effect may be significantly reduced. Accordingly, to achieve the asymmetric structure of a channel area between the source and the drain of the silicon-based FET and, simultaneously, effectively realize the asymmetry structure for the source/drain area facing the gate, there is a desire for an additional method differing from a typical self-alignment method. For example, Korean Laid-open Patent No. 2013-0133368 discloses a terahertz detector for maximizing an asymmetry effect.
The aforementioned patent has an advantageous characteristic in configuring a source/drain area in an asymmetric form to increase a sensitivity of a detector. However, an additional process may be required to asymmetrically construct a source/drain and a gate based on a quadrangular shape.